Cadence Design Systems > Case Studies > Uniquify's Success with Cadence for Enhanced SoC Design and Manufacturing

Uniquify's Success with Cadence for Enhanced SoC Design and Manufacturing

Technology Category

Application Infrastructure & Middleware - Event-Driven Application
Processors & Edge Intelligence - System on a Chip

Applicable Industries

Electrical Grids
Mining

Applicable Functions

Product Research & Development

Use Cases

Additive Manufacturing
Time Sensitive Networking

Services

System Integration
Testing & Certification

About The Customer

Uniquify is a provider of leading-edge system-on-chip (SoC) design and manufacturing, and intellectual property (IP) solutions. The company offers a broad spectrum of SoC design, and places a special emphasis on adaptive variation-aware double data rate (DDR) IP—a patented, highly differentiated technology featuring self-calibrating logic (SCL) and dynamic SCL. Founded in 2005, Uniquify is known for its “ideas2silicon™” approach, which spans from SoC planning, logic design, and design for test (DFT) to physical design and manufacturing services. Uniquify uses its own proprietary design management system, Perseus™, to drive a consistent, convergent SoC design methodology, reduce time to design, and provide advanced schedule tracking and resource management. The company supports several foundries, including TSMC, Samsung, GLOBALFOUNDRIES, and SMIC.

The Challenge

Uniquify, a leading provider of system-on-chip (SoC) design, manufacturing, and intellectual property solutions, faced the challenge of maintaining its high customer satisfaction levels and reputation by achieving 100% tapeout success. The company had set a high bar for itself in multiple application domains, including image processing, networking, digital television, DSL, mobile phones, digital cameras and displays, multimedia processing, and audio processing. To meet today’s aggressive performance, power, and cost goals, Uniquify engineers had to perform comprehensive physical design space exploration and feasibility analysis early in the design process. Given the complexity and size of today’s designs, they needed systems with the capacity to handle 100M instances and more.

The Solution

Uniquify turned to Cadence, one of its preferred EDA partners, to help meet its design challenges. The company specifically used Cadence Encounter Digital Implementation (EDI) System to maximize performance and minimize area and power for its high-performance, leading-edge designs. The EDI System supports advanced process technologies and system-in-package (SiP)/3D-IC design. Uniquify’s proprietary design management system, Perseus, drives the EDI System to give Uniquify engineers an early, accurate view of design feasibility. The engineers are equipped to progress immediately to full-scale implementation and final signoff for large-scale, complex designs—without ever leaving the solution environment. Uniquify also relies on Cadence QRC Extraction for fast, accurate 3D full-chip parasitic extraction and analysis during design and at signoff.

Operational Impact

The use of Cadence's solutions has resulted in several operational benefits for Uniquify. The EDI System combines early and rapid design exploration and accurate chip feasibility analysis using unique and patented abstraction technology; automated floorplan synthesis; clock tree and clock mesh synthesis; advanced nanometer routing; full-chip virtual prototyping; and full-chip digital implementation and signoff in a single environment. This has allowed Uniquify to maintain its high standards of quality and customer satisfaction. The flexibility of licensing and the ability to use the toolset on an as-needed basis has also been a key benefit of working with Cadence. Looking forward, Uniquify is considering using Cadence Virtuoso solutions for its mixed-signal layout needs, aligning with the company’s goal to streamline its entire design system.

Quantitative Benefit