技术
- 分析与建模 - 数字孪生/模拟
- 功能应用 - 企业资源规划系统 (ERP)
适用行业
- 半导体
适用功能
- 产品研发
- 质量保证
用例
- 数字孪生
- 虚拟现实
服务
- 测试与认证
关于客户
Xilinx 是现场可编程门阵列 (FPGA) 的领先供应商。该公司提供各种软IP核供客户构建到他们的设计中,以及在制造过程中在硅中实现的硬IP块。这些产品通过 IP 使用和重用加速了开发过程。 Xilinx 丰富的 IP 核集代表了数百种通信标准、存储器接口、DSP 功能、浮点运算符、互连,甚至 CPU。为了方便客户针对特定终端应用进行设计定制,Xilinx IP 解决方案提供了许多用户可配置的属性。
挑战
Xilinx 是领先的 FPGA 提供商,为其客户提供各种软核和硬核 IP 核。这些 IP 核代表数百种通信标准、存储器接口、DSP 功能、浮点运算符、互连和 CPU。然而,该公司在使用所有相关参数值组合测试其 IP 设计时面临着重大挑战。这个详尽的过程需要使用所有可能的数据宽度值测试所有主要设计模式。由于组合数量较多且运行回归的周转时间较长,创建所有参数的详尽排列集的传统解决方案是不可行的。 Xilinx 需要一种能够随机生成参数集的解决方案,同时考虑所有参数的合法值及其之间的依赖关系,同时避免参数集重复和测试套件回归的冗余重复。
解决方案
为了应对这一挑战,Xilinx 将 Cadence Incisive Enterprise Simulator 与 Specman 宏结合起来以增强参数生成。这个预模拟步骤成为了回归流程的一部分。 Cadence 提供了一个宏,用于指定需要详尽生成哪些参数集以及可以简单地随机化哪些字段,并尽可能减少重复。该解决方案建立在 Specman e 语言之上。该解决方案具有多种优势,包括灵活性、易用性和运行时间改进。它可以轻松地对约束进行分层、显式生成详尽的集合以及随机生成其他参数而无需重复。该解决方案易于使用,只需最终用户指定参数值和约束即可。运行时间的改进是显着的,过去需要一个多小时的过程现在变得易于管理且高效。
运营影响
数量效益
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